The present invention relates to a method for fabricating a varactor diode on a semiconductor substrate. More particularly, the invention relates to a method for fabricating high Q, high voltage varactor diodes in a readily reproducible manner.
A conventional varactor diode incorporates an active semiconductor layer which is sandwiched between a pair of contact layers. The two contact layers are of high conductivity and are of opposite conductivity type from each other, such that one of the contact layers forms a PN junction with the active layer. The thickness of the active layer, as well as the relative conductivity between the active layer and each of the contact layers, determines the operating characteristics of the varactor.
Varactor diodes are frequently fabricated by initially providing a silicon substrate having a resistivity which matches that of the desired active layer. The heavily doped contact layers are then epitaxially formed and conductor material is deposited on the contact layers. Alternatively, the diode can be formed by starting with a high conductivity substrate and then sequentially forming an epitaxial active layer and epitaxial contact layer.
However, both of these conventional fabrication techniques present significant practical problems. The formation of heavily doped epitaxial films creates dopant atom contamination in the deposition chamber which is used, necessitating stringent cleaning procedures between deposition runs and additional maintenance. Any residues which remain in the chamber during deposition make the dopant concentration in the epitaxial film difficult to control, thereby reducing yield. Furthermore, the growth of a relatively low conductivity active layer on a heavily doped contact layer generates a significant number of crystalline defects in the active layer.
In an effort to overcome some of these manufacturing difficulties, the use of a buffer layer between the high conductivity contact layer and active layer has been suggested. For example, in LARGE-AREA VARACTOR DIODE FOR ELECTRICALLY TUNABLE HIGH POWER UHF BANDPASS FILTER, by G. A. Swartz et al, IEEE Trans., Vol. ED-27, No. 11, November 1980, varactor diodes are reported to be fabricated by epitaxially forming N+, N, and P+ layers on an N++ silicon substrate. The N+ layer in this structure serves to minimize the number of defects introduced by the N++ silicon substrate into the N active layer. However, this suggested fabrication technique does not completely rectify the aforementioned contamination problems. Deposition chamber contamination still occurs during the formation of heavily doped epitaxial layers, limiting control over the impurity profile in the active layer.
In an effort to eliminate these remaining problems, the present method for fabricating diodes has been developed. In the following description the conductivity of particular semiconductor regions will be referred to as very high, high, or low. Very high conductivity regions, designated N++ or P++, have carrier concentrations greater than approximately 10.sup.19 cm.sup.-3 ; high conductivity regions, designated N+ or P+, have approximately 10.sup.18 cm.sup.-3 ; and low conductivity regions, designated N or P, have approximately 10.sup.15 to 10.sup.17 cm.sup.-3.